XC2S100-5PQG208I

Field-Programmable Gate Array, QFP-208, –0.5 to 3.6 V, Fully PCI compliant, 56K bits

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Price:: US $5.85~7.85 / piece [Get Latest Price]

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PartNumber:: XC2S100-5PQG208I

Brand:: Xilinx, Inc - Xilinx | Pack: QFP | D/C: 09+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Products Upload time: 2012-01-11

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Part Number:XC2S100-5PQG208I
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Product Summary

The XC2S100-5PQG208I is a Field-Programmable Gate Array. It gives users high performance, abundant logic resources, and a rich feature set, all at an exceptionally low price. The XC2S100-5PQG208I offers densities ranging from 15,000 to 200,000 system gates. System performance is supported up to 200 MHz. Features of the XC2S100-5PQG208I include block RAM (to 56K bits), distributed RAM (to 75,264 bits), 16 selectable I/O standards, and four DLLs. Fast, predictable interconnect means that successive design iterations continue to meet timing requirements.

Parametrics

XC2S100-5PQG208I absolute maximum ratings: (1)VCCINT, Supply voltage relative to GND:–0.5 to 3.0 V; (2)VCCO, Supply voltage relative to GND: –0.5 to 4.0 V; (3)VREF, Input reference voltage: –0.5 to 3.6 V; (4)VIN, Input voltage relative to GND, 5V tolerant I/O: –0.5 to 5.5 V; No 5V tolerance: –0.5 to VCCO+0.5 V; (5)VTS, Voltage applied to 3-state output, 5V tolerant I/O: –0.5 to 5.5 V; No 5V tolerance:–0.5 to VCCO +0.5 V; (6)TSTG, Storage temperature (ambient): –65 to +150℃; (7)TJ, Junction temperature: +125℃.

Features

XC2S100-5PQG208I features: (1)Fully PCI compliant; (2)Low-power segmented routing architecture; (3)Full readback ability for verification/observability; (4)Dedicated carry logic for high-speed arithmetic; (5)Efficient multiplier support; (6)Cascade chain for wide-input functions; (7)Abundant registers/latches with enable, set, reset; (8)Four dedicated DLLs for advanced clock control; (9)Four primary low-skew global clock distribution nets; (10)IEEE 1149.1 compatible boundary scan logic.