THC63LVD824

receiver, QFP-100, -0.3V ~ +4.0V, 1.0W, 25-170MHz, -30mA ~ 30mA

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Price:: US $2.85~3.85 / piece [Get Latest Price]

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	US $2.85~3.85

PartNumber:: THC63LVD824

Brand:: THine Electronics, Inc. - THine | Pack: QFP | D/C: 07+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Total Price:: US $0

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Products Upload time: 2012-02-04

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Part Number:THC63LVD824
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Product Summary

The THC63LVD824 is a receiver designed to support Single Link transmission between Host and Flat Panel Display up to SXGA+ resolutions and Dual Link trans- mission between Host and Flat Panel Display up to UXGA resolutions. The THC63LVD824 converts the LVDS data streams back into 48bits of CMOS/TTL data with falling edge or rising edge clock for convenient with a variety of LCD panel controllers.

Parametrics

THC63LVD824 absolute maximum ratings: (1)Supply Voltage (VCC): -0.3V ~ +4.0V; (2)CMOS/TTL Input Voltage: -0.3V ~ (VCC + 0.3V); (3)CMOS/TTL Output Voltage: -0.3V ~ (VCC + 0.3V); (4)LVDS Receiver Input Voltage: -0.3V ~ (VCC + 0.3V); (5)Output Current: -30mA ~ 30mA; (6)Junction Temperature: +125℃; (7)Storage Temperature Range: -55 ~ +125℃; (8)Lead Temperature (Soldering, 10sec): +230℃; (9)Maximum Power Dissipation @+25℃: 1.0W.

Features

THC63LVD824 features: (1)Wide dot clock range: 25-170MHz suited for VGA, SVGA, XGA, SXGA, SXGA+ and UXGA; (2)PLL requires No external components; (3)Supports Single Link up to 135MHz dot clock for SXGA+; (4)Supports Dual Link up to 170MHz dot clock for UXGA; (5)50% output clock duty cycle; (6)TTL clock edge programmable; (7)TTL output driverbility selectable for lower EMI; (8)Power down mode; (9)Low power single 3.3V CMOS design; (10)100pin TQFP; (11)THC63LVDF84B compatible.